Along with the pursuit of smaller sizes, increased functions, and faster communications in electronic equipment, further higher densities of the circuit boards which are used for the electronic equipment have been sought. To meet such demands for higher densities, circuit boards are being made multilayered. Such multilayer circuit boards are, for example, formed by taking an inside layer board which is comprised of an electrical insulating layer and a conductor layer which is formed on its surface, laminating an electrical insulating layer over it, forming a conductor layer over this electrical insulating layer, and further repeating this lamination of an electrical insulating layer and formation of a conductor layer. The electrical insulating layer and the conductor layer can be formed in several stages as required.
In such a multilayer circuit board, the difference in linear expansion between the conductor layers and the electrical insulating layers sometimes causes the circuit to break. In particular, this problem of breakage of circuit was remarkable when the conductor layers formed high density patterns. Therefore, in multilayer circuit boards, reduction of the linear expansion of the electrical insulating layers has been sought. To lower the linear expansion of electrical insulating layers, in general, adding an inorganic filler is effective, but by adding an inorganic filler, the electrical insulating layers end up becoming greater in surface roughness. When forming conductor layers on the surfaces of the electrical insulating layers and etching the conductor layers so as to form micro wiring, there is the problem that poor etching leads to the conductor remaining between the patterns and to blistering or peeling of the conductors.
As opposed to this, to reduce the surface roughness of electrical insulating layers, for example, Patent Document 1 discloses the art of forming the electrical insulating layers by two-layer structures of layer which contains an inorganic filler and layer which does not contain an inorganic filler.
Further, Patent Document 2 discloses the art of forming the electrical insulating layers by two-layer structures of layer which contains a polyimide, polyamide, or other resin ingredients and inorganic fillers with a specific surface area of 20 m2/g or more and 600 m2/g or less and layer which contains resin ingredients such as thermoplastic polyimide and inorganic fillers with an average particle diameter from 0.1 to 5 μm.